{"id":77,"date":"2014-03-31T03:05:24","date_gmt":"2014-03-30T19:05:24","guid":{"rendered":"http:\/\/www.anaglobe.com\/?page_id=77"},"modified":"2016-10-12T17:30:37","modified_gmt":"2016-10-12T09:30:37","slug":"plag","status":"publish","type":"page","link":"https:\/\/anaglobe.com\/chinese\/products\/plag\/","title":{"rendered":"PLAG"},"content":{"rendered":"<ul>\n<li><a href=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2016\/10\/PLAG_datasheet_2015.pdf\">Brochure<\/a><\/li>\n<\/ul>\n<h3>OVERVIEW<\/h3>\n<p>PLAG is based on GOLF, a production-proven OpenAccess-based layout platform adopted by world-class semiconductor\u00a0companies since 2007. PLAG features powerful layout editing functions, intuitive GUI, flexible customization and\u00a0extension. PLAG provides a versatile layout editor and viewer with simplicity and flexibility. PLAG provides API in\u00a0C++\/TCL\/PERL\/PYTHON (and more on demand) to help customers develop a variety of applications. PLAG is a\u00a0cost-effective solution with strong customization support.<\/p>\n<h3><img loading=\"lazy\" decoding=\"async\" class=\"alignright size-full wp-image-668\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-01.jpg\" alt=\"plag-01\" width=\"400\" height=\"244\" \/>HIGHLIGHTS<\/h3>\n<ul>\n<li>Dynamic viewing: mouse zooming,\u00a0command viewing<\/li>\n<li>Selection schemes: mouse select,\u00a0command select<\/li>\n<li>Undo and redo<\/li>\n<li>Auto contact, auto slot<\/li>\n<li>Array stretch, split, chop<\/li>\n<li>Bus router<\/li>\n<li>Equal resistance router<\/li>\n<li>Resistance measurement<\/li>\n<li>Hierarchical net tracer<\/li>\n<li>DRC result viewer<\/li>\n<li>Data creation: shapes, text, text-array,\u00a0instance and array, etc.<\/li>\n<li>Editing: stretch, align, copy, move,\u00a0transform, append, cut, merge, delete, yank, paste, properties\u2026<\/li>\n<li>Hierarchical editing: descend, push, EIP, flatten, make cell, etc.<\/li>\n<li>Query: ruler, distance, measurement, tree, connectivity, trace, etc.<\/li>\n<li>GUI-based PCell Designer<\/li>\n<li>PCell-based automated generator for flat panel display layout<\/li>\n<li>Customized functions: Trim Wire, Print with Exact Size, R\/C Loading, Job File Generation, DXF Import\/Export, etc.<\/li>\n<\/ul>\n<h3>PCell Designer<\/h3>\n<p>Evolved with the experiences and feedbacks of PCell programmers and layout engineers, PLAG provides a visualized\u00a0integrated development environment (IDE) for parameterized layout design, preview, testing, debug, and\u00a0documentation on layout directly. It is based on AnaGlobe&#8217;s patented highly flexible and reusable hierarchical\u00a0parameterized layout generator. The OpenAccess (OA) objects of the existing layout can be parameterized directly. More\u00a0complicated objects such as polygon text, fingers, spiral, and runway are provided. Layout can be composed by\u00a0geometric operations with object lifetime control. User-defined code (in C++\/TCL\/PERL\/PYTHON) can still be integrated\u00a0as well.<\/p>\n<ul>\n<li><img loading=\"lazy\" decoding=\"async\" class=\"alignright size-full wp-image-669\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-02.jpg\" alt=\"plag-02\" width=\"400\" height=\"256\" \/>Program on layout<\/li>\n<li>Intuitive GUI-based parameterized\u00a0layout creation, composition,\u00a0preview, debugging, testing, and\u00a0documentation<\/li>\n<li>Layout as a sequence of\u00a0parameterized object evaluations<\/li>\n<li>Existing layout can be easily\u00a0extracted to objects<\/li>\n<li>40+ flexible and reusable object\u00a0types \u2013 from primitive to versatile,\u00a0all parameterized<\/li>\n<li>Step-by-step graphically defined \u2013\u00a0similar to manual editing<\/li>\n<li>Easy to review and debug<\/li>\n<li>Maintains design know-how<\/li>\n<li>Very easy to craft a variety of automated layout generators<\/li>\n<li>Field extensible: supports user-defined objects by C++\/TCL\/Python\/Perl<\/li>\n<li>OpenAccess-based: interoperable with any OA-based tools<\/li>\n<\/ul>\n<h4>SCHEMATIC-DRIVEN LAYOUT (SDL)<\/h4>\n<p>SDL operates with a hierarchical connectivity model\u00a0working simultaneously at all levels of the design hierarchy.\u00a0This capability will alarm connectivity errors as the net is\u00a0short or open. This makes designers easier to understand\u00a0the complexity of interactions through the design hierarchy.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-670\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-03.jpg\" alt=\"plag-03\" width=\"400\" height=\"196\" \/><\/p>\n<p>SDL also supports one-to-many mapping across multiple\u00a0hierarchy levels. This allows layout designers to view\u00a0different layout hierarchies at the same time for efficient\u00a0net tracing or debugging. The cross probing of hierarchy net\u00a0tracer and Short Indicator can easily highlight the problem\u00a0net without Place-and- Route (P&amp;R), LVS or LPE. It does\u00a0significantly reduce efforts and speed up the debugging\u00a0processes.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-671\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-04.jpg\" alt=\"plag-04\" width=\"400\" height=\"167\" \/><\/p>\n<h4>SOPHISTICATED GUI<\/h4>\n<ul>\n<li>Multiple windows management:\n<ul>\n<li>Layout windows : tile\/cascade, bird view review<\/li>\n<li>Navigation-based forms: dock\/floating<\/li>\n<li>Option forms: pop-up\/minimized (prompt bar)<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-672\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-05.jpg\" alt=\"plag-05\" width=\"400\" height=\"242\" \/><\/p>\n<ul>\n<li>Comprehensive using style:\n<ul>\n<li>Layout windows: tile\/cascade, bird view review<\/li>\n<li>Navigation-based forms: dock\/floating<\/li>\n<li>Option forms: pop-up\/minimized (prompt bar)<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-673\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-06.jpg\" alt=\"plag-06\" width=\"400\" height=\"144\" \/><\/p>\n<h4>HANDY EDITING FUNCTIONS<\/h4>\n<ul>\n<li>Align\/Abut:\n<ul>\n<li>Edge to edge, point to point<\/li>\n<li>dx\/dy offset or Distance mode<\/li>\n<li>Multi-to-one alignment (abut)<\/li>\n<\/ul>\n<\/li>\n<li>Array instance manipulations:\n<ul>\n<li>Direct stretch<\/li>\n<\/ul>\n<\/li>\n<li>Rule guide\n<ul>\n<li>Minimum rules activated snap<\/li>\n<\/ul>\n<\/li>\n<li>Text array:\n<ul>\n<li>Irregular pitch supported<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-676\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-07.jpg\" alt=\"plag-07\" width=\"400\" height=\"75\" \/><\/p>\n<h4>CUSTOMIZED ROUTERS FOR FPD LAYOUT<\/h4>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter size-full wp-image-675\" src=\"http:\/\/www.anaglobe.com\/wp-content\/uploads\/2014\/03\/plag-08.jpg\" alt=\"plag-08\" width=\"400\" height=\"255\" \/><\/p>\n<h4>PANEL LAYOUT AUTOMATED GENERATOR<\/h4>\n<p>The PLAG solution is the leading technology in flat panel\u00a0display design and layout. With built-in and customized\u00a0solution for flat panel layout, PLAG enables FPD designers\u00a0to create, edit and verify the flat panel design in an\u00a0integrated and high-performance environment. Following\u00a0user-defined patterns and parameters, Equal Resistance\u00a0Route and Bumping Route make fan-in and fan-out\u00a0connections quickly and accurately.<\/p>\n<p>PLAG provides 8 steps to generate FPD Layout:<\/p>\n<ol>\n<li>Generate Dimension and Pixel Cells<\/li>\n<li>Generate Other Devices<\/li>\n<li>Generate FPC and IC Placement<\/li>\n<li>Generate Pin Labels<\/li>\n<li>Routing<\/li>\n<li>Generate Align Mark<\/li>\n<li>Generate Sealant and V Com<\/li>\n<li>Generate Report<\/li>\n<\/ol>\n","protected":false},"excerpt":{"rendered":"<p>Brochure OVERVIEW PLAG is based on GOLF, a production-p [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":145,"menu_order":0,"comment_status":"open","ping_status":"open","template":"","meta":{"jetpack_post_was_ever_published":false,"footnotes":""},"class_list":["post-77","page","type-page","status-publish","hentry"],"jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/P58Z2f-1f","_links":{"self":[{"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/pages\/77","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/comments?post=77"}],"version-history":[{"count":6,"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/pages\/77\/revisions"}],"predecessor-version":[{"id":284,"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/pages\/77\/revisions\/284"}],"up":[{"embeddable":true,"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/pages\/145"}],"wp:attachment":[{"href":"https:\/\/anaglobe.com\/chinese\/wp-json\/wp\/v2\/media?parent=77"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}